Arria V Hard IP for PCI Express IP Core Speed Grade Support - Arria V Hard IP for PCI Express IP Core Speed Grade Support Description By default, the Quartus II software selects an Arria V GX -6 part for the Arria V Hard IP for PCI Express IP Core. However, the Arria V GX device only supports -4 and -5 speed grades. Arria V GT devices can also support the -6 speed grade if you add a Synopsys Design Constraint (SDC) for the Transceiver Reconfiguration Controller IP Core clock, reconfig_xcvr_clk , to top_hw.sdc . set_false_path -from [get_ports {reconfig_xcvr_clk}] -to [get_ports {hsma_clk_out_p2}] Resolution This issue is fixed in version 14.0 of the Quartus II software. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] 14.0 11.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']