Transceiver Toolkit for 28-nm Devices - Same Course in Simplified Chinese: 收发器工具包 39 Minutes Are you trying to improve the signal integrity of your transceiver links? This can be a challenge with the multi-gigabit interfaces used in FPGA designs. This training introduces the Transceiver Toolkit found in the Altera® Quartus® Prime software v. 15.1 & shows how to use it to optimize your high-speed channel’s transmitter & receiver analog settings. Learn how to build a design so that you can connect to its transceiver channel buffers & perform various link tests. Using Transceiver Toolkit features like Auto Sweep & EyeQ, you can verify & potentially improve the Bit Error Rate (BER) of your system. Note: This training covers Cyclone® V, Arria® V & Stratix® V device families. For Altera® Arria® 10 devices, see the training Transceiver Toolkit for Altera® Arria® 10 Devices. Course Objectives At course completion, you will be able to: Download a Cyclone V, Arria® V or Stratix® V design example to perform link tests or Incorporate transceiver Toolkit support into your own design Setup and Launch the transceiver Toolkit to perform a high speed link test perform BER Testing using the Auto Sweep and EyeQ features in the Toolkit Select the best analog settings to Optimize the signal integrity of your transceiver link Skills Required Basic knowledge of the Altera® Quartus Prime software including the Platform Designer tool General understanding of FPGA architecture including transceiver architecture General understanding of transceiver Reconfiguration concepts If the audio for the course does not start automatically, press pause and then play on the course player. The transcript of the course audio is available in the Notes or closed captioning (CC) feature of the player. If you need assistance with this course, please email fpgatraining@altera.com . Reference Course Code: FPGA_OTCVR1100. FPGA_OTCVR1100. <p>Transceiver Toolkit for 28-nm Devices</p> - 2025-12-28
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