Warning: Verilog HDL Always Construct warning at <file name>.v(): variable <name> is used in Always Construct, but isn't in the Always Construct's Event Control. - Warning: Verilog HDL Always Construct warning at <file name>.v(): variable <name> is used in Always Construct, but isn't in the Always Construct's Event Control. Description This error occurs in the Quartus ® II software version 4.0 when using the always construct with a wildcard, e.g., always @ (*) . This problem is fixed beginning with version 4.1 of the Quartus II software. To avoid the problem in versions earlier than 4.1, specify signals explicitly in the always construct's event control, e.g., always@(<signal 1> or <signal 2> or <signal 3>) instead of always@(*) . Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']