Why do I run into link issues while running the Stratix V PCIe AVMM example designs in hardware? - Why do I run into link issues while running the Stratix V PCIe AVMM example designs in hardware? Description The Stratix® V Hard IP for PCI Express® Avalon-MM example .qsys designs in Quartus® II software version 14.1 and earlier are missing the reconfiguration driver. Resolution The user needs to manually connect the reconfiguration driver to the reconfiguration controller as follows: Figure 1. Reconfig controller connection View full size Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 13.0 ['Stratix® V FPGAs', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']