Error <project_path>/synthesis/submodules/(ip_module.v) ( ): Module '(ip_module_block)' is not defined. - Error <project_path>/synthesis/submodules/(ip_module.v) ( ): Module '(ip_module_block)' is not defined. Description Due to a problem in the Quartus® Prime Lite and Standard Edition Software version 21.1 and earlier, you might see this error when simulating your design. The error occurs when using NativeLink to generate the simulation files for your design (Tools -> Run Simulation Tool -> RTL Simulation) because the generated.do file contains paths to the synthesis folder instead of the simulation folder. Resolution To work around this problem, open the generated .do file and change the path manually from synthesis to simulation : vlog -vlog01compat -work <IP name> +incdir+<project_file>/ synthesis {<project_file>/ synthesis /<file_name.v>} vlog -vlog01compat -work <IP name> +incdir+<project_file>/ simulation {<project_file>/ simulation /<file_name.v>} Custom Fields values: ['novalue'] Troubleshooting 14017375727 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Standard'] No plan to fix 18.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']