Calibration Fails for QDR II/II Designs Targeting Stratix V Devices - Calibration Fails for QDR II/II Designs Targeting Stratix V Devices Description Half-rate QDR II/II designs using the Nios II sequencer at speeds below 300 MHz may experience calibration failures when targeting Stratix V devices. This issue will be fixed in a future version of the QDR II and QDR II SRAM Controller with UniPHY. Resolution The workaround for this issue is to run half-rate QDR II/II designs using the Nios II sequencer targeting Stratix V devices at speeds faster than 300 MHz. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 11.1 ['Stratix® V FPGAs'] ['novalue'] ['novalue'] ['novalue']