Why is an error message shown when opening the PHY Lite for Parallel Interfaces Intel FPGA IP with the “Use dynamic reconfiguration” feature enabled? - Why is an error message shown when opening the PHY Lite for Parallel Interfaces Intel FPGA IP with the “Use dynamic reconfiguration” feature enabled? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.3 and earlier, an error message will be seen in the System Messages tab when opening the PHY Lite for Parallel Interfaces Intel FPGA IP with the “Use dynamic reconfiguration” feature enabled in the IP Parameter Editor Pro: Error: Factory com.altera.sopcfactories.QsysFactory reading <design directory>\phylite_s20_enable_dynamic_reconfig_example_design\phylite_debug_kit.qsys exception com.altera.utilities.altNode.AltNodeException: (in-memory string): Premature end of file. (XML) Resolution No workaround to this problem exists when using the Intel® Quartus® Prime Pro Edition Software version 22.3 and earlier. This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 15011953194 False ['PHY Lite for Parallel Interfaces Stratix® 10 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] No plan to fix 22.2 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']