Why does accessing an invalid register address on the AXI-Lite management bus of the MACsec Intel® FPGA IP cause the bus to hang? - Why does accessing an invalid register address on the AXI-Lite management bus of the MACsec Intel® FPGA IP cause the bus to hang? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.2, access to an invalid address on the AXI-Lite management bus of the MACsec Intel® FPGA IP will cause the bus to hang. Resolution To work around this problem in the Intel® Quartus® Prime Pro Edition Software v22.2, do not attempt to access invalid (unspecified) register addresses on the AXI-Lite bus. This problem has been fixed starting with the release of version 22.3 of the Intel® Quartus® Prime Pro Edition software. Custom Fields values: ['novalue'] Troubleshooting 14016863686 False ['Interfaces'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 22.3 22.2 ['Agilex™ 7 FPGA I-Series'] ['novalue'] ['novalue'] ['novalue']