Setup Violation in HDMI TX Core for 4 Symbols per Clock Configuration - Setup Violation in HDMI TX Core for 4 Symbols per Clock Configuration Description When you configure the HDMI TX core at 4 symbols per clock, your design may fail setup timing in every 3 out of 20 Fitter seeds., with less than 200 ps negative slack. The critical path resides in the Auxiliary Encoder and Audio modules. Resolution To work around this issue, turn on the Aggressive Performance Optimization mode in the Quartus Compiler Settings to achieve timing closure. This issue is fixed in version 16.1 of the HDMI IP core. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 16.1 16.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']