Error (15847): Illegal value "none" for ena_register_mode parameter in Clock Control Block "altclk_ext_CIVE_altclkctrl_0:xaltclk_ext_CIVE_altclkctrl_0_inst|altclk_ext_CIVE_altclkctrl_0_sub:altclk_ext_CIVE_altclkctrl_0_sub_component|clkctrl1" - Error (15847): Illegal value "none" for ena_register_mode parameter in Clock Control Block "altclk_ext_CIVE_altclkctrl_0:xaltclk_ext_CIVE_altclkctrl_0_inst|altclk_ext_CIVE_altclkctrl_0_sub:altclk_ext_CIVE_altclkctrl_0_sub_component|clkctrl1" Description You may see this error in the Intel® Quartus® Prime Standard Software version 16.1 when compiling a Cyclone® IV design with an instance of the Clock Control Block (ALTCLKCTRL) IP with the "ena" port enabled. Error (15847): Illegal value "none" for ena_register_mode parameter in Clock Control Block "altclk_ext_CIVE_altclkctrl_0:xaltclk_ext_CIVE_altclkctrl_0_inst|altclk_ext_CIVE_altclkctrl_0_sub:altclk_ext_CIVE_altclkctrl_0_sub_component|clkctrl1" -- value must be "double register" when the ena input is used and the clock type is "External Clock Output" Resolution To work around this issue, manually change the register_ena_mode in the auto-generated RTL from "none" to "double register." This problem is fixed starting with the Intel® Quartus® Prime Standard Edition Software version 17.1. Custom Fields values: ['novalue'] Troubleshooting FB: 452468; False ['ALTCLKCTRL IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 17.1 16.1 ['Cyclone® IV FPGAs'] ['novalue'] ['novalue'] ['novalue']