How can the Arria 10 EMIF Traffic Generator be set for infinite loop test? - How can the Arria 10 EMIF Traffic Generator be set for infinite loop test? Description When generating an Arria®10 EMIF example design, a traffic generator is implemented by default, but the traffic generator settings can't be configured through Qsys. Resolution After generating the HDL for the Arria 10 EMIF example design, change the Qsys IP top files with the generic parameter as below: .TEST_DURATION ("INFINITE"), The traffic generator will perform read/write tests infinitely. Custom Fields values: ['novalue'] Troubleshooting novalue False ['External Memory Interfaces Arria® 10 FPGA IP'] ['novalue'] novalue novalue ['Arria® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']