Error: add_fileset_file: No such file 15.0/ip/altera/merlin/altera_irq_clock_crosser/cadence/altera_irq_clock_crosser.sv while executing "add_fileset_file cadence/altera_irq_clock_crosser.sv SYSTEM_VERILOG_ENCRYPT PATH "cadence/altera_irq_clock_cros - Error: add_fileset_file: No such file 15.0/ip/altera/merlin/altera_irq_clock_crosser/cadence/altera_irq_clock_crosser.sv while executing "add_fileset_file cadence/altera_irq_clock_crosser.sv SYSTEM_VERILOG_ENCRYPT PATH "cadence/altera_irq_clock_cros Description Due to a problem in the Quartus® II software version 15.0, the altera_irq_clock_crosser fails to generate a VHDL simulation model and testbench. You may see the error below: Error: add_fileset_file: No such file 15.0/ip/altera/merlin/altera_irq_clock_crosser/cadence/altera_irq_clock_crosser.sv while executing"add_fileset_file cadence/altera_irq_clock_crosser.sv SYSTEM_VERILOG_ENCRYPT PATH "cadence/altera_irq_clock_crosser.sv" {CADENCE_SPECIFIC}" (procedure "sim_vhdl" line 4) invoked from within"sim_vhdl altera_irq_clock_crosser" Resolution To work around this problem, manually update the following file, altera_irq_clock_crosser_hw.tcl, as follows: Open< install_path>\ip\altera\merlin\altera_irq_clock_crosser\altera_irq_clock_crosser_hw.tcl in a text editor Browse to proc sim_vhdl (line 56 in 15.0b129) Remove the following two lines: add_fileset_file cadence/altera_irq_clock_crosser.sv SYSTEM_VERILOG_ENCRYPT PATH "cadence/altera_irq_clock_crosser.sv" {CADENCE_SPECIFIC} add_fileset_file synopsys/altera_irq_clock_crosser.sv SYSTEM_VERILOG_ENCRYPT PATH "synopsys/altera_irq_clock_crosser.sv" {SYNOPSYS_SPECIFIC} Save altera_irq_clock_crosser_hw.tcl and either re-open or refresh (F5) in Qsys This problem will be fixed in future version of the Quartus II software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 15.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']