How do I use the CHANGE_EDREG instruction to simulate a CRC error in Stratix, Stratix II, Arria GX, and Cyclone II and later series devices? - How do I use the CHANGE_EDREG instruction to simulate a CRC error in Stratix, Stratix II, Arria GX, and Cyclone II and later series devices? Description You can download the contents required to create a crc.jam file and follow the instructions below to issue the CHANGE_EDREG instruction to simulate a CRC error in Stratix®, Stratix II, Arria® GX, and Cyclone® II and later-series devices. Using the attached JAM file, modify line #9 to an arbitrary number. This is to change the CRC checksum value. DRSCAN 32, ; This will overwrite the CRC checksum in the Storage Register through the CHANGE_EDREG instruction. The CRC_Error pin will then go high, signaling a CRC error. You can use the command-line JAM player in the Quartus® II design software to execute the crc.jam file The command would be : quartus_jli -aconfig_io -cn crc.jam where n after the -c = the cable index. To find out the cable index for the USB-Blaster™, execute : quartus_jli -n Related Articles How do I use the EDERROR_INJECT JTAG instruction to simulate a CRC error in a Stratix III, Stratix IV or Arria II GX device? How do I clear the CRC error after using the CHANGE_EDREG JTAG instruction to force a CRC error? Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® GX FPGA', 'Cyclone® II FPGAs', 'Cyclone® III FPGAs', 'Cyclone® III LS FPGA', 'Cyclone® IV E FPGA', 'Cyclone® IV GX FPGA', 'Stratix® II FPGAs'] ['novalue'] ['novalue'] ['novalue']