Arria 10 EMIF IP Does Not Support Qsys Testbench Generation Flow - Arria 10 EMIF IP Does Not Support Qsys Testbench Generation Flow Description The Arria 10 EMIF IP is not compatible with the Qsys testbench generation flow. Generation of a Qsys testbench for Arria 10 EMIF IP will fail. Resolution The workaround for this problem is to manually instantiate the generated memory model (<instance_name>_mem_model.v/.vhd) in the Qsys-generated testbench (<instance_name>_tb.v/.vhd) . This problem will not be fixed. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 16.0 ['Arria® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']