What is the definition of the maximum allowed overshoot duration in Stratix IV, Arria V, Cyclone V, Stratix V, Arria 10 and Cyclone 10 GX? - What is the definition of the maximum allowed overshoot duration in Stratix IV, Arria V, Cyclone V, Stratix V, Arria 10 and Cyclone 10 GX?
Description The following table shows an example of the maximum allowed overshoot duration. The Example Overshoot Duration figure below shows the methodology to determine the overshoot duration. These can be used as a reference to define the maximum allowed overshoot duration in Stratix® IV, Arria® V, Cyclone® V, Stratix V, Arria 10 and Cyclone 10 GX devices. The overshoot voltage is shown in red and is present on the input pin at over 2.55 V but below 2.7 V. From the table, for an overshoot of 2.55 V, the percentage of high time for the overshoot can be as high as 42% over the lifetime of the device. Percentage of high time is calculated as (Delta T/T) × 100. When a device operates for 10 years, the total amount of the overshoot duration for 2.55V can be up to 4.2 years. For the maximum allowed overshoot duration for each device, see the table of maximum allowed overshoot during transitions in the respective device datasheet or handbook. Table. Example Maximum Allowed Overshoot During Transition Symbol Description Condition (V) Overshoot Duration as % Unit VI(AC) AC Input Voltage 2.50 100 % 2.55 42 % 2.60 18 % 2.65 9 % 2.70 4 % >2.70 No overshoot allowed %
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FB: 514922, 514924, 514925, 514926, 514928;
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['Arria® V FPGAs and SoCs', 'Cyclone® V FPGAs and SoCs', 'Arria® 10 FPGAs and SoCs', 'Cyclone® 10 GX FPGA', 'Stratix® IV FPGAs', 'Stratix® V FPGAs']
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['novalue'] - 2021-08-25
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