Does the ATX PLL support the High Bandwidth setting in Stratix® V GX and Arria® V GZ devices? - Does the ATX PLL support the High Bandwidth setting in Stratix® V GX and Arria® V GZ devices? Description Yes, the ATX PLL supports the High Bandwidth setting in Stratix® V GX and Arria® V GZ devices when the L Counter multiplied by the M Counter is less than or equal to 50. If you violate the above, you may encounter an internal error in the Quartus® II Assembler stage. Resolution A future version of the Stratix® V GX documentation detail this restriction. Custom Fields values: ['novalue'] Troubleshooting 110322 False ['novalue'] ['novalue'] novalue novalue ['Arria® V GZ FPGA', 'Stratix® V FPGAs'] ['novalue'] ['novalue'] ['novalue']