Ethernet 10G MAC failed ncsim/vhdl simulator elaboration stage - Ethernet 10G MAC failed ncsim/vhdl simulator elaboration stage Description When you generate an Ethernet 10G MAC with either of the following settings enabled in the GUI and targeting VHDL, the generated design will fail the elaboration stage when compiled with NCSIM simulator. 1. Enable Time Stamping = "1" 2. Speed = "1GBps/10Gbps" or "Multi-Speed 10 Mbps - 10 Gbps" Resolution To work around this problem, use the following command to generate simulation scripts that will elaborate correctly. make-ip-simscript --spd=<spd filename> --compile-to-work Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 16.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']