Why might my Stratix® IV GX device transceiver dynamic reconfiguration design fail to merge TX PLLs in the Quartus® II software? - Why might my Stratix® IV GX device transceiver dynamic reconfiguration design fail to merge TX PLLs in the Quartus® II software? Description Your Stratix IV GX device transceiver dynamic reconfiguration design fail to merge TX PLLs in the Quartus II software if you have not added GXB_TX_PLL_RECONFIG_GROUP assignments to your Quartus Settings File (.qsf). The GXB_TX_PLL_RECONFIG_GROUP QSF assignment informs the fitter which TX PLLs instantiated within the ALTGX transceivers should be merged. Resolution The example constraints below are for two ALTGX transceiver IPs configured to use dynamic reconfiguration to switch between a CMU TX PLL within a bank, an ATX PLL which is always outside of the transceiver bank, and a CMU that is located in an alternate transceiver bank to the channel. set_instance_assignment -name GXB_TX_PLL_RECONFIG_GROUP 0 -to "PMAPCS_PHY0|PMAPCS_PHY0_alt4gxb:PMAPCS_PHY0_alt4gxb_component|tx_pll0" set_instance_assignment -name GXB_TX_PLL_RECONFIG_GROUP 0 -to "PMAPCS_PHY1|PMAPCS_PHY1_alt4gxb:PMAPCS_PHY1_alt4gxb_component|tx_pll0" set_instance_assignment -name GXB_TX_PLL_RECONFIG_GROUP 1 -to "PMAPCS_PHY0|PMAPCS_PHY0_alt4gxb:PMAPCS_PHY0_alt4gxb_component|atx_pll0" set_instance_assignment -name GXB_TX_PLL_RECONFIG_GROUP 1 -to "PMAPCS_PHY1|PMAPCS_PHY1_alt4gxb:PMAPCS_PHY1_alt4gxb_component|atx_pll0" set_instance_assignment -name GXB_TX_PLL_RECONFIG_GROUP 2 -to "PMAPCS_PHY0|PMAPCS_PHY0_alt4gxb:PMAPCS_PHY0_alt4gxb_component|tx_pll_edge0" set_instance_assignment -name GXB_TX_PLL_RECONFIG_GROUP 2 -to "PMAPCS_PHY1|PMAPCS_PHY1_alt4gxb:PMAPCS_PHY1_alt4gxb_component|tx_pll_edge0" <PATH>|tx_pll0 is a CMU within the transceiver bank that the channel resides in. <PATH>|atx_pll0 is an ATX PLL which is always outside of a transceiver bank that the channel resides in. <PATH>|tx_pll_edge0 is a CMU in an alternate transceiver bank that the channel resides in. You can use the Quartus II RTL Viewer to navigate to the TX PLLs in the ALTGX component, and right-click to locate the TX PLL in the Quartus II Assignment Editor. Custom Fields values: ['novalue'] Troubleshooting 1307689868 False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 15.0 ['Stratix® IV GT FPGA', 'Stratix® IV GX FPGA'] ['novalue'] ['novalue'] ['novalue']