Error(18515): Attempted to route one dedicated refclk pin, xxx, to IOPLLs. In order to feed x IOPLLs, this signal must be promoted to a global clock. - Error(18515): Attempted to route one dedicated refclk pin, xxx, to IOPLLs. In order to feed x IOPLLs, this signal must be promoted to a global clock. Description This error may be seen in the Intel® Quartus® Prime Pro Edition software version 17.1 and later when multiple IOPLLs are driven directly by one dedicated reference clock in Intel® Stratix® 10 devices. Resolution To avoid this error, promote the reference clock to a global clock with the folloing constraint in Quartus Settings File (.qsf). set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to xxx Custom Fields values: ['novalue'] Troubleshooting 1507221460 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 17.1 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']