Quartus® Prime Software Features Transceiver Toolkit - Provides information on transceiver toolkit and the various resources available. Product Pages Test Wireline Access Networking Overview Transceiver Toolkit uses System Console technology to help FPGA and board designers validate transceiver link signal integrity in real-time in a system and improve board bring-up time. Test for bit-error rate (BER) while running multiple links at your target data rate to validate your board design with the Transceiver Toolkit. Tune transceiver analog settings for optimal link performance while using different test metrics to quantify results. Simultaneously test multiple devices across one or more boards using link tests in the Transceiver Toolkit GUI. Support for Agilex 3, Agilex 5, Agilex 7, Stratix 10, and Stratix V FPGAs and includes adaptive equalization (AEQ) and decision feedback equalization (DFE) for signal transmission robustness. The latest additions include support for Agilex 3. Overview Key Features Key Features Adjust and monitor transceiver settings live to accelerate board bring-up and debug. Real-Time Transceiver Tuning Built-in PRBS generator and checker streamline high-speed link validation. Integrated Bit Error Rate Testing (BERT) Automatically scan PMA analog settings while capturing signal eye diagrams for optimal tuning. Eye Viewer with AutoSweep Mode Channel Manager interface enables simultaneous testing and visibility across multiple links or boards. Multi-Channel Monitoring & Control Leverage advanced EQ features like Adaptive Equalization (AEQ) and Decision Feedback Equalization (DFE) directly from the toolkit. Signal Integrity Feature Access Easily manage test plots, manually adjust PMA settings, and compare results with save-and-load tools. Manual Control & Data Logging