10G/100G TCP/IP - The 10G/100G TCP/IP Offload Engine (TOE) IP Core is a high-performance, scalable, and fully synthesizable hardware accelerator that offloads TCP/IP protocol stack processing from the host CPU.It’s… Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series Stratix® 10 AX FPGA Stratix® 10 DX FPGA Stratix® 10 GX FPGA Stratix® 10 SX FPGA Stratix® 10 TX FPGA The 10G/100G TCP/IP Offload Engine (TOE) IP Core is a high-performance, scalable, and fully synthesizable hardware accelerator that offloads complete TCP/IP stack processing from the host CPU, enabling deterministic, wire-speed data transmission with ultra-low latency. Designed for FPGA and ASIC implementations, it delivers full hardware-based TCP, IP, ARP, ICMP, and optional UDP processing, significantly reducing CPU utilization while maintaining consistent performance under heavy traffic loads. Supporting sustained line-rate throughput at both 10G and 100G, the core efficiently manages thousands of concurrent sessions with configurable memory architecture, including external DDR or HBM integration for large buffer and connection table support. Its optimized pipeline architecture minimizes jitter and ensures predictable round-trip latency, making it ideal for high-frequency trading (HFT), data center acceleration, SmartNICs, storage over TCP (iSCSI, NVMe-oF), telecom infrastructure, and high-performance network appliances. With flexible host interfaces such as PCIe and AXI, advanced congestion and flow control mechanisms, hardware retransmission handling, checksum offload, and robust reliability features, the TOE IP Core enhances system throughput, reduces power consumption, lowers total cost of ownership, and accelerates time-to-market for next-generation high-bandwidth networking solutions. Access Aerospace ASIC Proto Data Center Cloud (Public, Private, Hybrid) Data Center OEM (IHV, ISV, SI, VAR) Defense Industrial Test Wireless 10G/100G TCP/IP Key Features Full TCP/IP Stack Offload: Hardware implementation of Layer 3 (IP) and Layer 4 (TCP/UDP) for maximum efficiency. Offering Brief No No No Yes Encrypted Verilog Verilog Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series Stratix® 10 AX FPGA Stratix® 10 DX FPGA Stratix® 10 GX FPGA Stratix® 10 SX FPGA Stratix® 10 TX FPGA Yes Yes 24.3.1 Offering Brief Production Linux (Enterprise & Embedded), Windows Server a1JUi000007ZvvRMAS What's Included Synthesizable RTL source code Ordering Information QB-IP-Ethernet-10G/100G-1 a1JUi000007ZvvRMAS Production Intellectual Property (IP) a1MUi00000BOWpkMAH a1MUi00000BOWpkMAH Member 2026-03-10T21:29:36.000+0000 The 10G/100G TCP/IP Offload Engine (TOE) IP Core is a high-performance, scalable, and fully synthesizable hardware accelerator that offloads TCP/IP protocol stack processing from the host CPU. It’s specifically designed for applications requiring high-throughput, low-latency data transmission, such as data centers, high-frequency trading (HFT), network appliances, and telecom infrastructure. Partner Solutions