Why do the Intel® Stratix® 10 E-Tile Native PHY IP PMA adaptation parameters fail to load to all channels of a given instance? - Why do the Intel® Stratix® 10 E-Tile Native PHY IP PMA adaptation parameters fail to load to all channels of a given instance? Description Due to a problem in the Intel® Stratix® 10 E-Tile Native PHY IP version 18.1 Update 1, the PMA adaptation parameters are only loaded to the first channel of a given instance. Resolution To work around this problem in the Intel® Quartus® Prime Pro Edition Software version 18.1 Update 1, follow the steps below: 1. Obtain the physical address of Channel 0 (base address of 0x0): 0x200[7:0]: 8’h00 0x201[7:0]: 8’h00 0x202[7:0]: 8’h00 0x203[7:0]: 8’h97 2. Copy to other channels (base address of 0x80000 for Channel 1, 0x100000 for Channel 2, etc.): 0x200[7:0]: 8’hADDR 0x201[7:0]: 8’h00 0x202[7:0]: 8’h00 0x203[7:0]: 8’h95 Where ADDR is the physical address of Channel 0 returned in 0x204 from the first set of register writes. Please refer to the Intel® Stratix® 10 E-Tile Transceiver PHY User Guide , "Configuring a PMA Parameter Using Native PHY IP" chapter for more information regarding PMA Adaptation Parameters within the Native PHY IP Core GUI." This problem is fixed in Intel® Quartus® Prime Pro Edition Software version 19.2. Custom Fields values: ['novalue'] Troubleshooting 1408805247 False ['Stratix® 10 E-Tile Transceiver Native PHY'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 19.2 18.1.1 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue'] - 2023-01-23

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