LL 40-100GbE IP Core Ignores FCS Errors in Flow Control Frames - LL 40-100GbE IP Core Ignores FCS Errors in Flow Control Frames Description The Low Latency 40-100GbE IP core should discard received flow control frames that have an FCS error. Instead, the IP core ignores the FCS error and processes the flow control frame as if it had no FCS error. Resolution This issue has no workaround. This issue will be fixed in a future version of the Low Latency 40- and 100-Gbps Ethernet MAC and PHY IP core. Custom Fields values: ['novalue'] Troubleshooting novalue True ['Ethernet'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 15.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']