Is there a known Parallel Flash Loader II FPGA IP issue when configuring Agilex™ 7 FPGA series devices in Avalon-ST configuration mode? - Is there a known Parallel Flash Loader II FPGA IP issue when configuring Agilex™ 7 FPGA series devices in Avalon-ST configuration mode? Description Yes, due to a problem with the Parallel Flash Loader II FPGA IP (PFL-II) in Quartus® Prime Standard Edition Software version 23.1 and earlier, you may see configuration fail with some bitstreams when configuring Agilex™ 7 FPGA series devices in Avalon-ST configuration mode. Resolution Upgrade the Parallel Flash Loader II FPGA IP in Quartus® Prime Standard Edition Software version 23.1.1 or implement the workaround in Why does PFL-II IP not meet Agilex™ 7 'nCONFIG high to nSTATUS high' timing specifications for FPGA configuration? Related Articles Why does PFL-II IP not meet Agilex™ 7 'nCONFIG high to nSTATUS high' timing specifications for FPGA configuration? Custom Fields values: ['novalue'] Troubleshooting 15017100654 False ['Parallel Flash Loader II IP'] ['FPGA Dev Tools Quartus® Prime Software Standard'] 23.1 19.1 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']