Why does the Agilex™ 5 FPGA EMAC not work with 50MHz Clock Settings? - Why does the Agilex™ 5 FPGA EMAC not work with 50MHz Clock Settings? Description Due to an issue in the Quartus® Prime Pro Edition Software version 25.1.1, selecting the 50MHz Clock setting for EMAC causes the EMAC to be unable to communicate with the external PHY. This is due to the clock selection of 50MHz and 250MHz being swapped in the previous version, and was fixed in Quartus® Prime Pro Edition Software version 25.1.1. In the Quartus® Prime Pro Edition Software version before 25.1.1, when selecting the 50MHz Clock selection, the 250MHz was selected and vice versa. Resolution To work around this problem, please only select the 250MHz Clock setting for the EMAC when using Quartus® Prime Pro Edition Software version 25.1.1. Additional Information For GMII and RGMII EMAC protocol supporting speeds above 1Gbps, a minimum clock speed required is above 50Mhz. The clock selection for the EMAC will be removed in future release and a default of 250Mhz will be selected. This change is scheduled to be implemented in the release of the Quartus® Prime Pro Edition Software 25.3.1. Custom Fields values: ['novalue'] Troubleshooting 15018451813 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 25.1.1 ['Agilex™ 5 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']