Fitter does not enforce that all pins within a group of I/O banks must share a single VCCPD pin for Stratix V - Fitter does not enforce that all pins within a group of I/O banks must share a single VCCPD pin for Stratix V Description Although all pins within a group of I/O banks must share a single V CCPD pin, the Fitter does not enforce this restriction.In Stratix V devices, a single V CCPD pin is shared with a group of I/O banks. I/O bank labels with the same number (such as 7A, 7B, 7C, and 7D) form a group that share the same V CCPD pin, with the exception of Banks 3A, 3B, 3C, and 3D—Banks 3A and 3B form a group with one V CCPD pin; Banks 3C and 3D form a different group with its own V CCPD pin.For example, an I/O bank that uses a 3.0-V V CCPD pin forces all other I/O banks in the same group to use 3.0-V V CCPD ; an I/O bank that uses a 2.5-V V CCPD pin forces all other I/O banks in the same group to use 2.5-V V CCPD .For details of supported V CCIO voltage levels available for V CCPD pins, refer to the I/O Standards and Voltage Levels section in the I/O Features in Stratix V Devices chapter of the Stratix V Device Handbook . Resolution If you use output or bidirectional pins with the 3.3 V-LVTTL/LVCMOS I/O standard, you must enforce the V CCPD restriction manually with location assignments. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] 10.0 10.1 ['Stratix® V FPGAs'] ['novalue'] ['novalue'] ['novalue']