Error: RST_N port on the PLL is not properly connected on instance - Error: RST_N port on the PLL is not properly connected on instance Description While compiling in Intel® Quartus® Prime software, you may see this error in the synthesis stage if an IOPLL instance in an Intel Arria® 10 or Stratix® 10 design is not connected to a valid reset signal. Resolution The reset port of the IOPLL needs to be driven either by an external input pin or internally generated logic so that the IOPLL can be reset if it loses lock. Custom Fields values: ['novalue'] Troubleshooting FB: 465100; False ['IOPLL IP', 'PLL'] ['FPGA Dev Tools Quartus® Prime Software Pro', 'FPGA Dev Tools Quartus® Prime Software Standard'] novalue 16.1 ['Arria® 10 FPGAs and SoCs', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']