What is the address of the "Write to the 'write' bit of the control and status register" in "Table 8: Using the Register-Based Reconfiguration Method to Reconfigure VOD Settings" of AN676? - What is the address of the "Write to the 'write' bit of the control and status register" in "Table 8: Using the Register-Based Reconfiguration Method to Reconfigure VOD Settings" of AN676? Description "Table 8: Using the Register-Based Reconfiguration Method to Reconfigure VOD Settings" of AN676 incorrectly lists the Memory Map Address of the "Write to the 'write' bit of the control and status register" as 0x4A. The correct Memory Map Address is 0x0A. Resolution The incorrect Memory Map Address will be corrected in a future release of AN676. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 13.0 ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue'] - 2021-08-25

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