Why does the Cadence Xcelium* simulator fail when using Dynamic Reconfiguration IP with PTP? - Why does the Cadence Xcelium* simulator fail when using Dynamic Reconfiguration IP with PTP? Description Due to a problem in the Quartus® Prime Pro Edition Software version 24.1, Agilex™ 7 F-Tile Dynamic reconfiguration IPs with PTP may show errors when using the Cadence Xcelium* simulator, similar to the error shown below: xmelab: *E,CUVIMG (../hardware_test_design/support_logic/eth_f_hw_auto_tiles.sv,23321|341): Implicit name not allowed in hierarchical name. Resolution There is no workaround. Custom Fields values: ['novalue'] Errata 15015332610 False ['F-Tile Dynamic Reconfiguration Suite IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] No plan to fix 24.1 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']