DDR3 VHDL Simulation in Max 10 Fails with Aldec Riviera-PRO - DDR3 VHDL Simulation in Max 10 Fails with Aldec Riviera-PRO Description This problem affects DDR3 interfaces on MAX 10 devices. For DDR3 interfaces on MAX 10 devices, VHDL simulation with the Aldec Riviera-PRO simulator may fail. Resolution The workaround for this issue is to use a simulator other than Aldec Riviera-PRO, for simulation of DDR3 interfaces on MAX 10 devices. This issue will be fixed in a future version. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 14.1 ['MAX® 10 10 FPGAs'] ['novalue'] ['novalue'] ['novalue']