Is it possible to use the crcblock WYSIWYG component and the CRC_ERROR signal internally without enabling the external CRC_ERROR pin in the Quartus II design software for Stratix V, Arria V, or Cyclone V devices? - Is it possible to use the crcblock WYSIWYG component and the CRC_ERROR signal internally without enabling the external CRC_ERROR pin in the Quartus II design software for Stratix V, Arria V, or Cyclone V devices?
Description Yes, it is possible to use the crcblock WYSIWYG component and the CRC_ERROR signal internally without enabling the external CRC_ERROR pin in the Quartus® II software for Stratix ® V, Arria ® V, or Cyclone ® V devices.
Custom Fields values:
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Troubleshooting
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False
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['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V E FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA', 'Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA']
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['novalue'] - 2021-08-25
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