Deinterlacer IP Core Produces Erroneous Control Packet - Deinterlacer IP Core Produces Erroneous Control Packet Description The Deinterlacer IP core in the Video and Image Processing Suite version 14.0 produces erroneous Control packets. These Control packets have an incorrect width value of 0. This issue affects all systems using the Deinterlacer IP core. Resolution For systems that use the Motion Adaptive mode of the Deinterlacer, you are recommended to upgrade to the Deinterlacer II IP core. This issue will be fixed in a future version of the Deinterlacer IP core. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 14.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']