Why is it not possible to drive out on pins that are reserved as bi-directional when performing post-configuration mode boundary scan testing on Arria V or Cyclone V devices? - Why is it not possible to drive out on pins that are reserved as bi-directional when performing post-configuration mode boundary scan testing on Arria V or Cyclone V devices?
Description Due to a problem in the Quartus® II software version 13.1, the output buffers of pins that are reserved as bidirectional are disabled in Arria® V or Cyclone ® V devices. This may result in not being able to drive a logic \'0\' or ‘1’ when performing EXTEST during post-configuration mode boundary scan testing. Resolution A patch is available below to fix this problem for the Quartus® II software version 13.1. Download the Quartus II software version 13.1a10 Patch 0.02a for Windows (.exe) Download the Quartus II software version 13.1a10 Patch 0.02a for Linux (.run) Readme for the Quartus II software version 13.1a10 Patch 0.02a (.txt) This problem is scheduled to be fixed in a future version of the Quartus II software.
Custom Fields values:
['novalue']
Troubleshooting
novalue
False
['novalue']
['FPGA Dev Tools Quartus II Software']
novalue
13.1
['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V ST FPGA']
['novalue']
['novalue']
['novalue'] - 2022-01-18
external_document