Why do I see permission denied error in Windows (64-bit) when using ModelSim*- Altera® FPGA to simulate Agilex® 7 CPRI PHY IP Example Design on the Quartus® Prime Pro Edition software version 21.4? - Why do I see permission denied error in Windows (64-bit) when using ModelSim*- Altera® FPGA to simulate Agilex® 7 CPRI PHY IP Example Design on the Quartus® Prime Pro Edition software version 21.4? Description The issue occurs when using ModelSim®–Altera FPGA to simulate the Agilex® 7 CPRI PHY IP Example Design on a Windows (64-bit) system. This problem does not occur when running the same simulation on a Linux system. Resolution To work around this problem: Create a new folder called temp under example testbench. Copy the MIF file into it. In the script ./example_testbench/sim_script/common/modelsim_files.tcl, revise the MIF path. lappend memory_files "[normalize_path "$QSYS_SIMDIR/../temp/cpriphy_ftile_hw__tiles__z1577a_x388_y0_n0.mif"]" Alternative: In the script ./example_testbench/sim_script/mentor/msim_setup.tcl, revise as follow. Line 188: file copy -force $file ./ ----> catch { file copy -force $file ./ } This problem is fixed beginning with the Quartus® Prime Pro Edition software version 22.2. Custom Fields values: ['novalue'] Troubleshooting CEG-1954 novalue ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 22.2 21.4 ['Agilex™ 7 FPGAs and SoCs', 'Agilex™ 9 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']