How do I use the “o_rx_pcs_fully_aligned” signal to tell the difference between a local fault condition and valid RX data when using the Stratix® 10 E-tile Hard IP for Ethernet IP configured in PCS FEC status without the MAC? - How do I use the “o_rx_pcs_fully_aligned” signal to tell the difference between a local fault condition and valid RX data when using the Stratix® 10 E-tile Hard IP for Ethernet IP configured in PCS FEC status without the MAC? Description To use the o_rx_pcs_fully_aligned signal to determine a local fault condition, implement the following pseudo-code on the RX MII port: If (o_rx_pcs_fully_aligned == 0) ( • local fault pattern received on mii_data (RX) • remote fault is expected on the TX serial data ) else if (o_rx_pcs_fully_aligned == 1 && mii_valid==1) • mii_data is a valid XGMII block else if (o_rx_pcs_fully_aligned ==1 && mii_valid==0) • Ignore mii_data as it is not valid XGMII data endif Resolution This information has been added starting on release version 18.1.1 of the Stratix® 10 FPGA E-Tile Hard IP for Ethernet Intel FPGA IP Core user guide. Custom Fields values: ['novalue'] Troubleshooting FB: 597593; False ['Ethernet'] ['FPGA Dev Tools Quartus® Prime Software Pro'] No plan to fix 18.0 ['Stratix® 10 TX FPGA'] ['novalue'] ['novalue'] ['novalue'] - 2023-01-23

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