Difficult Timing Closure for QDR-IV Interfaces on Arria 10 Devices - Difficult Timing Closure for QDR-IV Interfaces on Arria 10 Devices
Description This problem affects QDR-IV interfaces on Arria 10 devices. The QDR-IV IP is expected to have difficulty achieving core timing closure. . Resolution In some instances, compiling across multiple seeds may facilitate timing closure. This issue will be fixed in a future version.
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Troubleshooting
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True
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['FPGA Dev Tools Quartus® Prime Software Pro']
15.1
15.0
['Programmable Logic Devices']
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['novalue'] - 2021-08-25
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