Why doesn't tx_par_err[1] assert with bad parity of Tx avalon-st packet on my simulation? - Why doesn't tx_par_err[1] assert with bad parity of Tx avalon-st packet on my simulation?
Description Due to problems in the Intel® Quartus® II software version 12.0sp2 and earlier, the simulation model of PCIe HIP does not assert tx_par_err[1] with bad parity of Tx avalon-st packet even though tx_par_err[0]is asserted with the parity and packet. Resolution This issue is fixed in Intel® Quartus® software version 13.1.
Custom Fields values:
['novalue']
Troubleshooting
2205723301
True
['PCI Express']
['FPGA Dev Tools Quartus II Software']
13.1
12.0
['Stratix® V GX FPGA']
['novalue']
['novalue']
['novalue'] - 2023-03-20
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