MSC-CTRL Microsecond Channel high-speed controller - The MSC-CTRL IP core implements a high-speed serial interface controller designed to connect an SoC to external power devices or sensors. It implements the Microsecond Channel (MSC) protocol and acts… CAST develops, sells, and supports digital Silicon IP Cores which electronic system designers use to shorten development time and lower production risk. CAST uniquely gives system designers the CAST… Agilex™ 3 FPGA C-Series Agilex™ 5 FPGA D-Series Agilex™ 5 FPGA E-Series Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series Agilex™ 9 FPGA Direct RF-Series Arria® 10 GT FPGA Arria® 10 GX FPGA Arria® 10 SX FPGA Arria® V GT FPGA Arria® V GX FPGA Arria® V GZ FPGA Arria® V ST FPGA Arria® V SX FPGA Cyclone® 10 GX FPGA Cyclone® 10 LP FPGA Cyclone® IV E FPGA Cyclone® IV GX FPGA Cyclone® V E FPGA Cyclone® V GT FPGA Cyclone® V GX FPGA Cyclone® V SE FPGA Cyclone® V ST FPGA Cyclone® V SX FPGA MAX® 10 FPGA Stratix® 10 AX FPGA Stratix® 10 GX FPGA Stratix® 10 SX FPGA Stratix® 10 TX FPGA The MSC-CTRL IP core implements a high-speed serial interface controller designed to connect a microcontroller or SoC to external power devices or sensors. It implements the Microsecond Channel (MSC) protocols derived from the Microsecond Bus (uSB) serial concept—and acts as a bus master for downstream transmission and as a bus slave for upstream transmission. The MSC-CTRL connects microcontrollers to peripheral devices via high-speed synchronous downstream and low-speed asynchronous upstream channels. It supports up to four slave devices in the MSC mode, advanced features, fragmented command frames, and higher upstream baud rates, provide robust communication in a network of dedicated sensors or devices. The controller’s communication with the host processor is facilitated by a 32-bit AMBA® APB4 subordinate interface. The MSC-CTRL features trigger signals to facilitate easy integration with an external DMA controller and a comprehensive set of interrupt sources for reporting status and error information. The silicon-proven MSC-CTRL core is designed to industry best practices and has been rigorously verified. Available functional safety documents facilitate ISO 26262 ASIL B certification. High Speed Test Transportation MSC-CTRL Microsecond Channel high-speed controller Key Features Supported Protocols - MSC standard used by Infineon, Renesas, etc. - Microsecond Bus (uSB) per SAE 2005-01-0057 Offering Brief No Yes No Yes Encrypted Verilog Verilog Agilex™ 3 FPGA C-Series Agilex™ 5 FPGA D-Series Agilex™ 5 FPGA E-Series Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series Agilex™ 9 FPGA Direct RF-Series Arria® 10 GT FPGA Arria® 10 GX FPGA Arria® 10 SX FPGA Arria® V GT FPGA Arria® V GX FPGA Arria® V GZ FPGA Arria® V ST FPGA Arria® V SX FPGA Cyclone® 10 GX FPGA Cyclone® 10 LP FPGA Cyclone® IV E FPGA Cyclone® IV GX FPGA Cyclone® V E FPGA Cyclone® V GT FPGA Cyclone® V GX FPGA Cyclone® V SE FPGA Cyclone® V ST FPGA Cyclone® V SX FPGA MAX® 10 FPGA Stratix® 10 AX FPGA Stratix® 10 GX FPGA Stratix® 10 SX FPGA Stratix® 10 TX FPGA Yes Yes 24.3.1 Offering Brief Production a1JUi000009MapFMAS What's Included Verilog/System Verilog, encrypted Verilog/System Verilog, or netlist Ordering Information MSC-CTRL a1JUi000009MapFMAS Production Intellectual Property (IP) a1MUi00000BO8rRMAT a1MUi00000BO8rRMAT Member 2026-07-01T21:11:31.000+0000 The MSC-CTRL IP core implements a high-speed serial interface controller designed to connect an SoC to external power devices or sensors. It implements the Microsecond Channel (MSC) protocol and acts as a bus master for downstream and as a bus slave for upstream transfers. The MSC-CTRL is integrated to peripherals via high-speed synchronous downstream and low-speed asynchronous upstream channels. It supports up to four slave devices in the MSC mode, advanced features, fragmented command frames, and higher upstream baud rates, provide robust communication in a network of dedicated sensors or devices. The IP includes a 32-bit AMBA® APB4 subordinate interface and includes trigger signals to facilitate easy integration with an external DMA controller. The silicon-proven MSC-CTRL core is designed to industry best practices and has been rigorously verified. Optional functional safety documents facilitate ISO 26262 ASIL B standard. Partner Solutions