How can I choose my own reset pin location for npor when using the soft reset controller for the Hard IP for PCI Express? - How can I choose my own reset pin location for npor when using the soft reset controller for the Hard IP for PCI Express? Description To use your own reset pin location for npor, first, ensure that you are using the soft reset controller by checking that the hip_hard_reset_hwtcl parameter is set to 0 in your instantiation of the Hard IP for PCI Express®: .hip_hard_reset_hwtcl (0), To utilize the npor port as the Hard IP reset signal, edit the following files as shown below: altpcie_sv_hip_128bit_atom.v - for Stratix® V altpcie_av_hip_128bit_atom.v - for Arria® V and Cyclone® V Change from: .pinperstn(pin_perst) To: .pinperstn((USE_HARD_RESET == 0)?1’b1 : pin_perst) You can now choose any reset pin location for your npor signal. Resolution There is no plan to fix this in the future release. Custom Fields values: ['novalue'] Troubleshooting 0 False ['novalue'] ['novalue'] novalue novalue ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']