Stratix IV Pin Connection Guidelines: Known Issues - Stratix IV Pin Connection Guidelines: Known Issues Description Issue 137246: Version 1.8 If the JTAG connections are not used, user should connect the TDI pin to VCCPD via a 1-k. resistor, connect TMS to VCCPD via a 1-k. resistor, tie the TRST pin to GND, and leave TDO unconnected. Resolution Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Stratix® IV E FPGA', 'Stratix® IV GT FPGA', 'Stratix® IV GX FPGA'] ['novalue'] ['novalue'] ['novalue']