Max 10 IBIS model - Max 10 IBIS model Hello All, When narrowing down the option from IBIS model for the timing simulation, I get stuck here. I have chosen 3.3LVTTL, drive strength 4 mA, and no clamping and so have got these- to zoom in- Can someone please guide me in choosing between these 4 options of cio and rio (column inout and row inpout) and where would I find more details regarding that. Thanks a lot Neesha Replies: Re: Max 10 IBIS model Hi Neesha, All the IBIS Model you got from this link: IBIS Models for Intel Field Programmable Gate Array Devices are from Intel itself. Regards, Aqid Ayman Replies: Re: Max 10 IBIS model Thank you Aqid ! Replies: Re: Max 10 IBIS model Hello John, Thank you very much. That helped. Also, these IBIS models, are they validated by Intel itself ? Regards Neesha Replies: Re: Max 10 IBIS model Hi Neesha, Yes, you can refer to John's explanation. Additionally, you can also refer here: IBIS model IO standard naming nomenclature decoder - Intel Communities Hope this helps you too. Regards, Aqid Ayman Replies: Re: Max 10 IBIS model Hi rio is row IO, cio is column IO. Banks 1, 2, 5 and 6 are Row, while Banks 3, 4, 7, 8 are Column. Please consult the MAX 10 GIO User Guide for images of banks vs packages for your selected device https://www.intel.com/content/www/us/en/docs/programmable/683751/21-1/i-o-banks-locations.html Hope this helps. John