Why is the HPS EMAC FPGA interface not operational? - Why is the HPS EMAC FPGA interface not operational?
Description When using preloader software generated using the SoCEDS 14.1 for Cyclone® V and Arria® V SoC devices, the EMAC MII/GMII interface to the FPGA will not be enabled unless the FPGA is configured before the preloader executes. Resolution If the EMAC is routed to the FPGA and the FPGA is configured after preloader executes, the interface must be enabled by writing to the module register within the sysmgr registers. The definition of the register is here .
Custom Fields values:
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Troubleshooting
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False
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['Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA']
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['novalue'] - 2021-08-25
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