How can I enable interrupt support for the HLGPI[13:0] input-only pins? - How can I enable interrupt support for the HLGPI[13:0] input-only pins? Description The HLGPI[13:0] input-only pins of the Cyclone® V SX device share pins with the HPS DDR controller. To identify the pin location for these GPI pins, see the related solution. Physically the HLGPI[13:0] signals are connected to GPIO2_porta_input[13:26] in the HPS. You can configure the HLGPI to generate interrupts just like other GPIO in GPIO2 component. To configure the GPIO interrupts, configure the following registers - gpio_inten, gpio_intmask , gpio_inttype_leve l, and the gpio_int_polarity registers. These registers can be found in the address map for the Cyclone V HPS device at the Cyclone V HPS Register Address Map and Definitions web page. Resolution . Custom Fields values: ['novalue'] Troubleshooting 2205799416 False ['novalue'] ['FPGA Dev Tools Quartus II Software'] 13.0.1 12.1 ['Cyclone® V SX FPGA'] ['novalue'] ['novalue'] ['novalue']