What is the total combine page size of the Avalon to PCI Express address translation table that can be supported by the IP Compiler for PCI Express in SOPC and Qsys? - What is the total combine page size of the Avalon to PCI Express address translation table that can be supported by the IP Compiler for PCI Express in SOPC and Qsys? Description For SOPC Builder design, the total combine size of the address pages that can be supported is 2 Gigabytes. For Qsys design, the total combine size of the address pages that can be supported is 4 Gigabytes. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Stratix® IV GX FPGA'] ['novalue'] ['novalue'] ['novalue']