How to control the PIPE mode or serial mode in the example testbench? - How to control the PIPE mode or serial mode in the example testbench? Description One parameter, serial_sim_hwtcl, in the altprice_tbed_sv_hwtcl.v file, controls whether the testbench simulates in PIPE mode or serial mode. When is set to 0, the simulation runs in PIPE mode; when set to 1, it runs in serial mode. Resolution Custom Fields values: ['novalue'] Troubleshooting novalue False ['PCI Express'] ['novalue'] novalue novalue ['Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']