ALTMULT_ADD megafunction does not support VHDL with Stratix V - ALTMULT_ADD megafunction does not support VHDL with Stratix V
Description The ALTMULT_ADD megafunction does not support VHDL behavior models with the Stratix V device family. Resolution Use a co-simulator and VHDL wrapper code to generate a Verilog HDL simulation model or simulate with a ClearBox-generated design.
Custom Fields values:
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Troubleshooting
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True
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['FPGA Dev Tools Quartus II Software']
10.0
10.0
['Stratix® V FPGAs']
['novalue']
['novalue']
['novalue'] - 2021-08-25
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