Why are IBIS models not generated for the PCI IO standard by the Intel® Quartus® II design software when the current strength is set to a minimum? - Why are IBIS models not generated for the PCI IO standard by the Intel® Quartus® II design software when the current strength is set to a minimum? Description IBIS models are not generated for the PCI I/O standard in Quartus® II if a minimum current strength assignment has been applied, as the PCI I/O standards do not support current strength control. A warning of the form given below will be observed during IBIS file generation if a minimum current strength assignment has been made: Warning: IBIS model for pin "pci_<pin name>" at package pin <pin location> is not available Resolution To work around this issue, remove any current strength assignments made to PCI I/O standard pins and re-compile the design. Custom Fields values: ['novalue'] Troubleshooting 348362 False ['PCI'] ['novalue'] novalue novalue ['Arria® GX FPGA', 'Arria® II GX FPGA', 'Arria® II GZ FPGA', 'Cyclone® II FPGAs', 'Cyclone® III FPGAs', 'Cyclone® III LS FPGA', 'Cyclone® IV E FPGA', 'Cyclone® IV GX FPGA', 'HardCopy™ III ASIC Devices', 'HardCopy™ IV E ASIC Devices', 'HardCopy™ IV GX ASIC Devices', 'MAX® II CPLDs', 'MAX® II Z CPLD', 'Stratix® II FPGAs', 'Stratix® II GX FPGA', 'Stratix® III FPGAs', 'Stratix® IV E FPGA', 'Stratix® IV GT FPGA', 'Stratix® IV GX FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']