Error (12341): The input pin has a HCSL I/O standard, but the selected device does not support input pin operation with a HCSL I/O standard. - Error (12341): The input pin has a HCSL I/O standard, but the selected device does not support input pin operation with a HCSL I/O standard. Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software versions 21.1 and 21.2, the following error message is observed during the fitter stage when using the HCSL I/O standard for the reference clock input pins for the R-Tile Avalon® Streaming Intel® FPGA IP for PCI Express: Error (12341): The input pin has a HCSL I/O standard, but the selected device does not support input pin operation with a HCSL I/O standard. Resolution To work around this problem in the Intel® Quartus® Prime Pro Edition software versions 21.1 and 21.2, set the R-Tile Avalon® Streaming Intel® FPGA IP for PCI Express reference clock input as the CML I/O standard. The reference clock driving these clock pins must be HCSL, as per the PCI Express Base Specification and the Intel Agilex ® Device Family Pin Connection Guidelines . This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 21.3. Custom Fields values: ['novalue'] Troubleshooting 1509368137 False ['PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 21.3 21.1 ['Agilex™ 7 FPGA I-Series'] ['novalue'] ['novalue'] ['novalue']