Why doesn't the Intel® Stratix® 10, Intel Arria® 10, and Intel Cyclone® 10 EMIF IP calibration sequencer start calibration on the second EMIF IP if the first EMIF IP in the same I/O column fails calibration? - Why doesn't the Intel® Stratix® 10, Intel Arria® 10, and Intel Cyclone® 10 EMIF IP calibration sequencer start calibration on the second EMIF IP if the first EMIF IP in the same I/O column fails calibration? Description If any EMIF IP calibration fails, then the calibration of any other EMIF IP residing in the same I/O column will not start. Resolution This is an expected behavior according to the IP specification. Custom Fields values: ['novalue'] Troubleshooting email communication False ['External Memory Interfaces Arria® 10 FPGA IP', 'External Memory Interfaces Stratix® 10 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 17.1 ['Arria® 10 FPGAs and SoCs', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']