Why does the E-tile Hard IP Intel® Stratix® 10 25G Ethernet to CPRI Dynamic Reconfiguration Design Example Modelsim simulation run never end ? - Why does the E-tile Hard IP Intel® Stratix® 10 25G Ethernet to CPRI Dynamic Reconfiguration Design Example Modelsim simulation run never end ? Description Due to a problem in the Intel® Quartus® Prime Pro Edition version 19.3 Software, the design example Modelsim simulation run will get stuck at the last stage of dynamic reconfiguration operation and not complete the simulation. # INFO: Starting dynamic reconfiguration: 2.4G CPRI --> 25G PTP RSFEC Resolution This problem is fixed starting with the Intel® Quartus® Prime Pro Edition version 19.4 software Custom Fields values: ['novalue'] Troubleshooting 1507807907 True ['25G Ethernet IP', 'Interfaces Communications CPRI (Primary)'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 19.4 19.3 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']